1. Field of the Invention
The present invention relates to a fabrication method of a semiconductor integrated circuit device and more particularly, to a fabrication method of a semiconductor integrated circuit device having capacitors, bipolar transistors and insulated-gate field-effect transistors (IGETs) on a semiconductor substrate.
2. Description of the Prior Art
Recently, with the conventional various semiconductor integrated circuit devices containing capacitors, the capacitors occupy a comparative large chip area and therefore, various types of the capacitors that enable to reduce the chip area and to keep or increase their capacitance have been developed.
An example of such the conventional semiconductor integrated circuit devices is disclosed in the Japanese Non-Examined Patent Publication No. 59-89450, which was published in May 1984.
This device has a semiconductor substrate of a first conductivity type, a first conductor layer of a second conductivity type formed on or in the substrate, a first insulator layer formed on the first conductor layer, a second conductor layer formed on the first insulator layer, a second insulator layer formed on the second conductor layer, a third conductor layer formed on the second insulator layer, a third insulator layer formed on the third conductor layer, a fourth conductor layer formed on the third insulator layer, a fourth insulator layer formed on the fourth conductor layer, and a fifth conductor layer formed on the fourth insulator layer. These stacked layers constitute a multi-layer capacitor. The first conductor layer may be a diffusion layer formed in the substrate.
If the first conductor layer is used as a part of the multi-layer capacitor, the capacitor is made of the first, second, third, fourth and fifth conductor layers and of the first, second, third and fourth insulator layers. The first, third and fifth conductor layers are electrically connected to each other. The second and fourth conductor layer are electrically connected to each other. The multi-layer capacitor is equivalent to a set of four parallel-connected capacitors.
If the first conductor layer is not used as a part of the multi-layer capacitor, the multi-layer capacitor is made of the second, third, fourth and fifth conductor layers and of the second, third and fourth insulator layers. The third and fifth conductor layers are electrically connected to each other. The second and fourth conductor layers are electrically connected to each other. The multi-layer capacitor is equivalent to a set of three parallel-connected capacitors.
The Japanese Non-Examined Patent Publication No. 59-89450 discloses the semiconductor device structure containing such the multilayer-capacitor alone.
Another example of such the conventional semiconductor integrated circuit devices is disclosed in the Japanese Non-Examined Patent Publication No. 64-22057 published in Jan. 1989. This device has both capacitors as passive elements and Metal-Oxide-Semiconductor FETs (MOSFETs) as active elements, which is described below referring to FIG. 1.
Although the device has a plurality of capacitors and a plurality of MOSFETs, only one of the capacitors and only one of the MOSFETs are shown in FIG. 1 for the sake of simplification of description.
In FIG. 1, a field insulator film 92 is selectively formed on a main surface of a p-silicon substrate 91, defining an active region for the MOSFET 70 thereon. In the active region, a pair of n-source/drain regions 71 are formed apart from each other in the substrate 91. A gate insulator film 72 is selectively formed on the main surface o the substrate 61 between the pair of source/drain regions 71. A gate electrode 73, which is made of a first polysilicon film, is formed on the gate insulator film 72. A pair of insulator sidewalls 74 are formed at each side of the gate electrode 73 on the gate insulator film 772 and the exposed main surface of the substrate 91. A covering insulator film 75 is formed to cover the top of the gate electrode 73.
A capacitor 80 having a multi-layer structure is provided adjacent to the MOSFET 770. The capacitor 80 is composed of a first capacitor electrode 81 made of a second polysilicon film, a first dielectric 82 a second capacitor electrode 83 made of a third polysilicon film, a second dielectric 84, and a third capacitor electrode 85 made of a fourth polysilicon film.
The first capacitor electrode 81 is formed on one of the pair of source/drain regions 71, the field insulator film 92, a corresponding one of the pair of sidewalls 74, and the covering insulator film 75, so that the electrode 81 is electrically connected to the contacting source/drain region 71. The first dielectric 82 is formed on the first capacitor electrode. 81. The second capacitor electrode 83 is formed on the first dielectric film 82. The second dielectric 84 is formed on the second capacitor electrode 83. The third capacitor electrode 85 is formed on the second dielectric 84.
A connection conductor film 86 is formed to cover the third capacitor electrode 85. The first capacitor electrode 81 are exposed from the second dielectric 82 at their both ends with which the connection conductor 6 is contacted. Thus, the first and third capacitor electrodes 81 and 85 are electrically connected to each other.
The side faces of the first capacitor electrode 81 at its ends are covered with insulator sidewalls 87a, respectively. The side faces of the second and third capacitor electrodes 83 and 85 at their ends are covered with insulator sidewalls 87b, respectively. The side faces of the connection conductor film 86 at its ends are covered with insulator sidewalls 87c, respectively.
The multi-layered capacitor 80 is equivalent to a set of two parallel-connected capacitors, one of which is composed of the first and second capacitor electrodes 81 and 83 and the first dielectric 82 placed therebetween and the other is composed of the third and second capacitor electrodes 85 and 83 and the second dielectric 84 placed therebetween.
With the conventional semiconductor integrated circuit device shown in FIG. 1, the gate electrode 73 of the MOSFET 70 is made of the first polysilicon film, and the first to third capacitor electrodes 81, 83 and 85 of the capacitor 80 are respectively made of the second, third and fourth polysilicon films. In other words, the gate electrode 73 is produced by using a polysilicon film other than those of the capacitor electrodes 81, 83 and 85 during a different process step. Accordingly the number of the necessary process steps for fabricating the conventional device increases, resulting in a high fabrication cost.
Also, since a part of the capacitor 80 is stacked on the MOSFET 70, high steps are generated over the substrate 61. Thus, the step coverage deteriorates and the fabrication yield decreases.